module ror(
  input [31:0] in,
  input [ 4:0] sh,
  output [31:0] out,
  output  cout
);
wire [32:0] net[0:31];
assign net[0] = {in, in[31]};
genvar i;
generate
for (i=1; i<32; i=i+1) begin: gen_net
  assign net[i] = {in[i-1:0], in[31:i], in[i-1]};
end
endgenerate
assign {out, cout} = net[sh];
endmodule
